Embedded Executive Podcast

Jerry Chen, founder and CEO of Upbeat Technology, is a low-power RISC-V SoC specialist who previously worked on CPU pipelines and with SiFive. He explains why Upbeat targets ultra-low-power markets like wearables and always-on IoT. He discusses RISC-V's power advantages, the SiFive partnership, licensing cores versus building them, tape-out experience, benchmarks, and tooling trade-offs.

It’s not the first time this has occurred, but it is the latest—a previously commercial real-time operating system is now being offered as open source. In this case, it’s SMX from Micro Digital. If you’re wondering, like I was, where the company would choose to go this route, check out this week’s Embedded Executives podcast with Ralph More, the Founder and President of Micro Digital.

Rob Oshana, Senior VP of Software and Digital Platforms at Analog Devices, leads development of CodeFusion. He discusses bundling hardware, tools, and software into one developer platform. He explains CodeFusion’s user-focused abstractions and AI add-ons for model import, tuning, optimization, and deployment. He also covers target verticals and linking analog signal chains to MCUs.

Jon Harros, Head of Certification at the Connectivity Standards Alliance, leads the team behind Matter compliance and testing. He explains what a Matter compliant platform is and how platform certification speeds time to market. He walks through implementation, testing coverage that reduces developer burden, migration paths from major ecosystems, and who in the supply chain benefits.

Compilers and ADAS aren’t often used in the same sentence. For developers, that anomaly can represent a design challenge, as compilers in general are not designed for this particular application, which also happens to be at the top of the safety and security checklist. To understand how these compilers should be tested and implemented, I spoke to Sjoerd van der Zwaan, the Chief Product Officer at Solid Sands, on this week’s Embedded Executives podcast. Sjoerd explains how and why compilers for ADAS are different from general compilers, and why you need to run your compiler through an appropriate series of tests to ensure compatibility.

AI at the endpoint gets yet another boost from EMASS, a fabless semiconductor company that recently emerged from stealth mode. Having your processing at the endpoint presents a few significant challenges, namely the amount of processing that can be made available and the ability to run from a battery. EMASS has come up with a way to do this a little differently from what’s been done previously. They can attach their RISC-V processing element to any sensor, making the device an AI accelerator. It’s a little difficult for me to put into words here, so check out this week’s Embedded Executives podcast, where I spent some time with Mark Goranson, EMASS’s CEO, who explains it in detail.

Xin Qiu, Head of Security Solutions at CommScope, builds PKI and provisioning services for devices. Patrick Carrier, Manager for Secure Solutions at Infineon, focuses on hardware secure elements and identity provisioning. They discuss why every device needs a unique identity. They cover wafer- and supply-chain provisioning, scaling tradeoffs, PKI’s role, and how hardware and services work together.

AI is a technology that generally requires a significant amount of power and high compute performance. Hence, it’s typically relegated to the Cloud or to an Edge-based computer.Performing AI at the endpoint has not been feasible for those reasons. With ambiq’s Sub-threshold Power Optimized technology (SPOT), performing AI at the endpoint is a reality. And the doors/applications that it opens are extremely cool. Hear more about it in this week’s Embedded Executives podcast, where I spoke to Ambiq’s Vice President of AI, Carlos Morales. Note that Ambiq just recently released the latest version of neuralSPOT, which now includes key performance enhancements specific to the company’s Apollo5 family, amongst other features, some of which are specific to AI development.

We’ve done podcasts in the past that discussed automating your code documentation. But we haven’t touched much on automating the code generation itself until now. On this week’s Embedded Executives podcast, I spoke to Jonathan Hacker, the Founder and CTO of TeleCANesis, and that’s exactly what they do. We got into the issues of why automated coding is better than manual coding. Then we had a very interesting discussion about why you shouldn’t consider AI for code generation, at least not yet.

Designing a device that incorporates AI can be daunting, for a good reason—it’s very complex. When you push that design out to the Edge, it brings in even more challenges, both on the hardware and software sides of the equation. To understand what these challenges are and where a designer can turn for help, I spoke to Amir Panush, the CEO of CEVA, on this week’s Embedded Executives podcast. He addresses these issues on a regular basis and has a good understanding of what a designer needs to know.