Jerry Chen
Founder and CEO of Upbeat Technology focused on low-power RISC-V SoC designs, with a background in CPU pipeline design and experience working with SiFive for licensed RISC-V cores.
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Nov 19, 2025 • 11min
Embedded Executive: RISC-V Works Great At Low Power Levels, Too | Upbeat Technology
Jerry Chen, founder and CEO of Upbeat Technology, is a low-power RISC-V SoC specialist who previously worked on CPU pipelines and with SiFive. He explains why Upbeat targets ultra-low-power markets like wearables and always-on IoT. He discusses RISC-V's power advantages, the SiFive partnership, licensing cores versus building them, tape-out experience, benchmarks, and tooling trade-offs.
