Asianometry Let’s Break Down the 45nm Process Node
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Nov 30, 2025 Explore the intriguing history of the 45-nanometer process node and its impact on the tech industry. Delve into the basics of MOSFETs and CMOS, highlighting crucial yield checks and wafer cleaning techniques. Discover the evolution from LOCOS to Shallow Trench Isolation and the challenges faced with gate construction. Learn about strain engineering for NMOS and PMOS, as well as the intricate process of salicide formation and copper damascene interconnects. Reflect on the remarkable complexity of semiconductor technology and its ongoing R&D efforts.
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Why STI Replaced LOCOS
- Shallow Trench Isolation (STI) replaced LOCOS to avoid bird's-beaking and surface non-uniformities.
- STI uses thermal oxide, silicon nitride stop layers, trench etch, TEOS CVD fill, anneal, and CMP for planarization.
Wells Are Opposite To Transistor Type
- CMOS requires opposite-type wells: NMOS sits on P-well and PMOS on N-well to enable inversion channels.
- Wells are formed with patterned ion implantation and verified by SIMS.
High‑K Dielectrics Changed Gate Design
- The 45nm node introduced high-K dielectrics (hafnium oxide) to control short-channel effects.
- This required changing the gate flow and enabled gate-last processes to protect metal gates during high‑temperature steps.